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00:00 - Intro - 4.1 - CPU
01:08 - The Von Neumann Model
03:00 - Fetch-Execute Cycle Explanation
12:56 - A-Level Problem - FE Cycle
14:15 - Register-Transfer Notation
16:46 - A-Level Problem - Register-Transfer Notation
18:46 - What is a register?
19:23 - Types of Registers
21:08 - A-Level Problem - Registers
22:16 - General vs. Special Purpose Registers
23:51 - Immediate Access Store & Caching
26:01 - Buses
27:46 - Arithmetic and Logic Unit
28:43 - Control Unit and System Clock
30:40 - Interrupts - Explanation and Causes
33:49 - Interrupt Handling
35:30 - A-Level Problem - Interrupts
36:41 - USB (Universal Serial Bus)
38:28 - HDMI & VGA
39:41 - Computer Performance Factors
40:07 - Number of Cores
42:19 - Bus Width
43:34 - Clock Speed
45:48 - Cache Memory
46:25 - A-Level Problem - Performance
47:22 - Intro - 4.2 - Assembly Language
47:48 - What is assembly language?
49:53 - Instruction Groups
55:54 - A-Level Problem - Assembly Language Trace 1
1:08:00 - A-Level Problem - Assembly Language Trace 2
1:17:03 - A-Level Problem - Assembly Language Trace 3
1:19:22 - Two-Pass Assembler
1:22:07 - A-Level Problem - Two-Pass Assembler
1:22:50 - Addressing Modes
1:25:06 - Intro - 4.3 - Bit Manipulation
1:26:11 - Bitwise Operations
1:26:53 - A-Level Problem - Bitwise Operations 1
1:28:51 - A-Level Problem - Bitwise Operations 2
1:30:37 - A-Level Problem - Bitwise Operations 3
1:31:17 - Binary Shifts
1:34:08 - A-Level Problem - Binary Shifts 1
1:35:35 - A-Level Problem - Binary Shifts 2
1:36:09 - A-Level Problem - Binary Shifts 3
1:38:43 - Channel Updates