Design and Implementation of an 8-bit Approximate Wallace Tree Multiplier for Energy Efficient Deep Neural Networks | Improvement of this Project:
• To design the Approximate 8x8 Wallace Tree Multiplier using Approximate Full adder and Half Adder
• To design the 4:2 Compressor using Approximate Full Adder design
• To design the Approximate 8x8 Wallace Tree Multiplier using Approximate Compressor design
• High performance Ladner Fischer Parallel prefix adder used for final additions.